Business Wire

Aldec Adds Customizable Tool Qualification Data Package to ALINT-PRO™ for DO-254 Projects

HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for FPGA and ASIC designs, has added a customizable tool qualification data ...
Electronic Design

EDA Update: Mixed HDL/C-Language Design For FPGAs

Mixed HDL/C-Language design for FPGAs recently debuted, courtesy of Aldec Inc. and Celoxica Ltd. The Active-HDL+C integrated FPGA design environment combines Aldec's Active-HDL design entry and ...
Business Wire

Aldec’s TySOM Family of Embedded System Development Solutions Now Supports Xilinx PYNQ (Python Productivity for Zynq)

HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for FPGA and ASIC designs, has added PYNQ Python Productivity for Zynq from ...